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Home Home Integrated Circuits (ICs) CPLDs EPM3512AFI256-10
EPM3512AFI256-10
  • EPM3512AFI256-10
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EPM3512AFI256-10

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Manufacturer No:

EPM3512AFI256-10

Manufacturer:

Altera

HK JDW NO:

2936-EPM3512AFI256-10

Package:

FBGA

Datasheet:

EPM3512AFI256-10

Description:

1mm PMIC 256 Pin 125MHz 3.3V FBGA

Quantity:

Add to RFQ list

In Stock : 999

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EPM3512AFI256-10 Overview


This network has 512macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).A FBGA package contains the item.It is programmed with 208 I/Os.The termination of a device is set to [0].This electrical part has a terminal position of BOTTOMand is connected to the ground.Power is supplied by a voltage of 3.3V volts.It is a part of the family [0].There are 256 pins on the chip.Additionally, this device is capable of displaying [0].10000gates are used to construct digital circuits.It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency.In order to store data, EEPROMis used.The electronic part is mounted by Surface Mount.There are 256 pins embedded in the device.There is a maximum supply voltage of 3.6V.The minimal supply voltage is 3V.A programmable I/O count of 208 has been recorded.You can achieve 125MHzfrequencies.It is recommended that the operating temperature exceeds -40°C.A temperature less than 85°Cshould be used for operation.In its simplest form, it consists of 32 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.A programmable logic type is categorized as EE PLD.

EPM3512AFI256-10 Features


FBGA package
208 I/Os
256 pin count
256 pins
32 logic blocks (LABs)

EPM3512AFI256-10 Applications


There are a lot of Altera EPM3512AFI256-10 CPLDs applications.

  • USB Bus
  • ROM patching
  • State machine design
  • Discrete logic functions
  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • Configurable Addressing of I/O Boards
  • Preset swapping
  • Reset swapping
  • I2C BUS INTERFACE
  • INTERRUPT SYSTEM
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Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

EPM3512AFI256-10

technical specifications, attributes, parameters and parts with similar specifications to EPM3512AFI256-10.

  • Type
    Parameter
    Select All

  • Factory Lead Time

    10 Weeks

  • Mount

    Surface Mount

  • Package / Case

    FBGA

  • Number of Pins

    256

  • Published

    1998

  • JESD-609 Code

    e0

  • Pbfree Code

    no

  • Moisture Sensitivity Level (MSL)

    3

  • Number of Terminations

    256

  • ECCN Code

    3A991

  • Terminal Finish

    Tin/Lead (Sn63Pb37)

  • Max Operating Temperature

    85°C

  • Min Operating Temperature

    -40°C

  • Additional Feature

    YES

  • HTS Code

    8542.39.00.01

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    BOTTOM

  • Terminal Form

    BALL

  • Peak Reflow Temperature (Cel)

    220

  • Supply Voltage

    3.3V

  • Terminal Pitch

    1mm

  • Frequency

    125MHz

  • Time@Peak Reflow Temperature-Max (s)

    30

  • Pin Count

    256

  • Operating Supply Voltage

    3.3V

  • Temperature Grade

    INDUSTRIAL

  • Max Supply Voltage

    3.6V

  • Min Supply Voltage

    3V

  • Number of I/O

    208

  • Memory Type

    EEPROM

  • Propagation Delay

    10 ns

  • Turn On Delay Time

    10 ns

  • Frequency (Max)

    116.3MHz

  • Programmable Logic Type

    EE PLD

  • Number of Gates

    10000

  • Number of Programmable I/O

    208

  • Number of Logic Blocks (LABs)

    32

  • Output Function

    MACROCELL

  • Number of Macro Cells

    512

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • Height Seated (Max)

    3.5mm

  • Length

    17mm

  • Width

    17mm

  • Radiation Hardening

    No

  • RoHS Status

    RoHS Compliant

  • Lead Free

    Contains Lead

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