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MC100EP51DTG
MC100EP51DTG
598-MC100EP51DTG
8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
-3V~-5.5V 3GHz 1 Bit D-Type Flip Flop DUAL 100EP51 8 Pins 45mA 100EP Series 8-TSSOP, 8-MSOP (0.118, 3.00mm Width)
In Stock : 999
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Product Details
Purchasing and Inquiry
MC100EP51DTG Overview
8-TSSOP, 8-MSOP (0.118, 3.00mm Width)is the packaging method. It is contained within the Tubepackage. The output it is configured with uses Differential. This trigger uses the value Positive, Negative. Surface Mountis positioned in the way of this electronic part. A supply voltage of -3V~-5.5V is required for operation. A temperature of -40°C~85°C TAis used in the operation. A flip flop of this type is classified as a D-Type. It belongs to the 100EPseries of FPGAs. You should not exceed 3GHzin its output frequency. During its operation, it consumes 45mA quiescent energy. Terminations are 8. The 100EP51 family contains this object. The D flip flop is powered by a voltage of 3.3V . There is an electronic part mounted in the way of Surface Mount. Basically, it is designed with a set of 8 pins. In this device, the clock edge trigger type is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. An electronic part with 1bits has been designed. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. It is imperative that the supply voltage (Vsup) is maintained above 3Vin order to ensure normal operation. The superior flexibility of this circuit is achieved by using 1 circuits. Considering its reliability, this T flip flop is well suited for RAIL. A power supply of -4.5Vis required to operate it. It offers maximum design flexibility with its output current of 50mA. Additionally, you may refer to the D latch's additional NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V. -50mAis set as the high level output current. 50mA is the low level output current.
MC100EP51DTG Features
Tube package
100EP series
8 pins
1 Bits
-4.5V power supplies
MC100EP51DTG Applications
There are a lot of ON Semiconductor MC100EP51DTG Flip Flops applications.
- Latch
- CMOS Process
- ESCC
- 2 – Bit synchronous counter
- Set-reset capability
- Shift registers
- Latch-up performance
- Buffered Clock
- EMI reduction circuitry
- Bus hold
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MC100EP51DTG
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