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SN74ABT821ADWR
SN74ABT821ADWR
815-SN74ABT821ADWR
24-SOIC (0.295, 7.50mm Width)
4.5V~5.5V 125MHz 10 Bit D-Type Flip Flop DUAL 74ABT821 24 Pins 250μA 74ABT Series 24-SOIC (0.295, 7.50mm Width)
In Stock : 999
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Product Details
Purchasing and Inquiry
SN74ABT821ADWR Overview
In the form of 24-SOIC (0.295, 7.50mm Width), it has been packaged. You can find it in the Cut Tape (CT)package. Tri-State, Non-Invertedis the output configured for it. JK flip flop uses Positive Edgeas the trigger. Surface Mountis in the way of this electric part. A 4.5V~5.5Vsupply voltage is required for it to operate. Temperature is set to -40°C~85°C TA. D-Typedescribes this flip flop. It is a type of FPGA belonging to the 74ABT series. This D flip flop should not have a frequency greater than 125MHz. A total of 1 elements are present. As a result, it consumes 250μA quiescent current. There have been 24 terminations. The 74ABT821 family contains it. An input voltage of 5Vpowers the D latch. The input capacitance of this JK flip flopis 3.5pF farads. It belongs to the family of electronic devices known as ABT. In this case, the electronic component is mounted in the way of Surface Mount. There are 24pins on it. This device has Positive Edgeas its clock edge trigger type. This RS flip flops is a part number FF/Latches. There are 10bits in its design. As a result of its reliability, this D flip flop is ideally suited for TR. A total of 5V power supplies are needed to run it. A total of 2ports are embedded in the D flip flop. Optimal efficiency requires a supply voltage of 5V. As a result of its output current of 64mA, it is very flexible in terms of design. It is designed with 3 output lines. It has 10lines.
SN74ABT821ADWR Features
Cut Tape (CT) package
74ABT series
24 pins
10 Bits
5V power supplies
SN74ABT821ADWR Applications
There are a lot of Texas Instruments SN74ABT821ADWR Flip Flops applications.
- Common Clocks
- ESD protection
- Individual Asynchronous Resets
- Frequency Dividers
- Data Synchronizers
- ESD performance
- Patented noise
- Balanced Propagation Delays
- Bus hold
- Differential Individual
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