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  • EPM7256AEFC256-7

EPM7256AEFC256-7

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Manufacturer No:

EPM7256AEFC256-7

Manufacturer:

Altera

HK JDW NO:

2936-EPM7256AEFC256-7

Package:

FBGA

Datasheet:

EPM7256AEFC256-7

Description:

1mm PMIC 256 Pin 166.67MHz 3.3V FBGA

Quantity:

In Stock : 999

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EPM7256AEFC256-7 Overview


There are 256 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).There is a FBGA package containing it.The device is programmed with 164 I/Os.Terminations of devices are set to [0].This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.It is powered by a voltage of 3.3V volts.There is a part in the family [0].It is programmed with 256 pins.If you use this device, you will also find [0].It is possible to construct digital circuits using 5000gates, which are devices that serve as building blocks.In order to achieve high efficiency, the supply voltage should be maintained at [0].In general, it is recommended to store data in [0].The electronic part is mounted by Surface Mount.There are 256 pins embedded in the device.A maximum voltage of 3.6Vis required for operation.A minimum supply voltage of 3V is required for it to operate.There are a total of 164 Programmable I/Os.In this case, 166.67MHzis the frequency that can be achieved.It is recommended that the operating temperature exceed 0°C.A temperature lower than 70°Cis recommended for operation.There are 16logic blocks (LABs) that make up its basic building block.It should be below 172.4MHzat the maximal frequency.A programmable logic type can be categorized as EE PLD.

EPM7256AEFC256-7 Features


FBGA package
164 I/Os
256 pin count
256 pins
16 logic blocks (LABs)

EPM7256AEFC256-7 Applications


There are a lot of Altera EPM7256AEFC256-7 CPLDs applications.

  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • Pattern recognition
  • Wide Vin Industrial low power SMPS
  • High speed graphics processing
  • Boolean function generators
  • Programmable polarity
  • Multiple Clock Source Selection
  • Software-Driven Hardware Configuration
  • Parity generators
  • Synchronous or asynchronous mode
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EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

2. Means of Payment

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3. RFQ (Request for Quotations)

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2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

4. Shipping Cost

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The basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and country.

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FedEx International, 5-7 business days.
The following are some common countries' logistic time.

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Payment Method

The fee is charged according to the rule of PayPal.
East West Bank charge US$30.00 banking fee.
The fee is charged according to the rule of PayPal.
Western Union charge US$0.00 banking fee.

Shipping

DHL(www.dhl.com)
From $40.00 basic shipping fee depend on zone and country.
UPS(www.ups.com)
From $40.00 basic shipping fee depend on zone and country.
FedEx(www.fedex.com)
From $40.00 basic shipping fee depend on zone and country.
Registered Mail(www.singpost.com)
From $10.00 basic shipping fee depend on different zone and country.

Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

EPM7256AEFC256-7

technical specifications, attributes, parameters and parts with similar specifications to EPM7256AEFC256-7.

  • Type
    Parameter
    Select All
  • Technology

    CMOS

  • Terminal Position

    BOTTOM

  • Terminal Form

    BALL

  • Peak Reflow Temperature (Cel)

    220

  • Supply Voltage

    3.3V

  • Terminal Pitch

    1mm

  • Frequency

    166.67MHz

  • Time@Peak Reflow Temperature-Max (s)

    30

  • Pin Count

    256

  • Operating Supply Voltage

    3.3V

  • Temperature Grade

    COMMERCIAL

  • Max Supply Voltage

    3.6V

  • Min Supply Voltage

    3V

  • Number of I/O

    164

  • Memory Type

    EEPROM

  • Propagation Delay

    7.5 ns

  • Turn On Delay Time

    7.5 ns

  • Frequency (Max)

    172.4MHz

  • Programmable Logic Type

    EE PLD

  • Number of Gates

    5000

  • Number of Programmable I/O

    164

  • Number of Logic Blocks (LABs)

    16

  • Speed Grade

    7

  • Output Function

    MACROCELL

  • Number of Macro Cells

    256

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • Height Seated (Max)

    2.1mm

  • Radiation Hardening

    No

  • RoHS Status

    RoHS Compliant

  • Lead Free

    Contains Lead

  • Factory Lead Time

    10 Weeks

  • Mount

    Surface Mount

  • Package / Case

    FBGA

  • Number of Pins

    256

  • Published

    1998

  • JESD-609 Code

    e0

  • Pbfree Code

    no

  • Moisture Sensitivity Level (MSL)

    3

  • Number of Terminations

    256

  • ECCN Code

    3A991

  • Max Operating Temperature

    70°C

  • Min Operating Temperature

    0°C

  • Additional Feature

    YES

  • HTS Code

    8542.39.00.01

  • Subcategory

    Programmable Logic Devices

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