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  • EPM7160ELC84-20

EPM7160ELC84-20

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Manufacturer No:

EPM7160ELC84-20

Manufacturer:

Altera

HK JDW NO:

2936-EPM7160ELC84-20

Package:

PLCC

Datasheet:

EPM7160ELC84-20

Description:

1.27mm PMIC 84 Pin 83.33MHz 5V PLCC

Quantity:

In Stock : 999

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EPM7160ELC84-20 Overview


There are 160 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).You can find it in package [0].There are 64 I/Os on the board.There is a 84terminations set on devices.This electrical part is wired with a terminal position of QUAD.A voltage of 5Vprovides power to the device.There is a part included in Programmable Logic Devices.With 84pins programmed, the chip is ready to use.Additionally, this device is capable of displaying [0].The 3200gates serve as building blocks for digital circuits.If high efficiency is to be achieved, the supply voltage should be maintained at [0].In general, it is recommended to store data in [0].It is mounted by Surface Mount.This board has 84 pins.There is a maximum supply voltage of 5.25V.A minimum supply voltage of 4.75V is required for it to operate.There are 64 programmable I/Os in this system.This can be achieved at a frequency of 83.33MHz.In order to operate properly, the operating temperature should be higher than 0°C.A temperature less than 70°Cshould be used for operation.In its simplest form, it consists of 10 logic blocks (LABs).It is recommended that the maximal frequency be less than 0.Programmable logic types are divided into EE PLD.

EPM7160ELC84-20 Features


PLCC package
64 I/Os
84 pin count
84 pins
10 logic blocks (LABs)

EPM7160ELC84-20 Applications


There are a lot of Altera EPM7160ELC84-20 CPLDs applications.

  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • Address decoders
  • Power automation
  • Bootloaders for FPGAs
  • INTERRUPT SYSTEM
  • ANALOG-TO-DIGITAL CONVERTOR (ADC)
  • Complex programmable logic devices
  • Pattern recognition
  • Digital multiplexers
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
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EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

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4. Shipping Cost

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FedEx International, 5-7 business days.
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Payment Method

The fee is charged according to the rule of PayPal.
East West Bank charge US$30.00 banking fee.
The fee is charged according to the rule of PayPal.
Western Union charge US$0.00 banking fee.

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UPS(www.ups.com)
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From $40.00 basic shipping fee depend on zone and country.
Registered Mail(www.singpost.com)
From $10.00 basic shipping fee depend on different zone and country.

Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

EPM7160ELC84-20

technical specifications, attributes, parameters and parts with similar specifications to EPM7160ELC84-20.

  • Type
    Parameter
    Select All
  • Mount

    Surface Mount

  • Package / Case

    PLCC

  • Number of Pins

    84

  • Published

    1998

  • JESD-609 Code

    e0

  • Pbfree Code

    no

  • Part Status

    Active

  • Moisture Sensitivity Level (MSL)

    2

  • Number of Terminations

    84

  • ECCN Code

    EAR99

  • Terminal Finish

    Tin/Lead (Sn/Pb)

  • Max Operating Temperature

    70°C

  • Min Operating Temperature

    0°C

  • Additional Feature

    CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V

  • HTS Code

    8542.39.00.01

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    QUAD

  • Terminal Form

    J BEND

  • Peak Reflow Temperature (Cel)

    220

  • Supply Voltage

    5V

  • Terminal Pitch

    1.27mm

  • Frequency

    83.33MHz

  • Time@Peak Reflow Temperature-Max (s)

    30

  • Pin Count

    84

  • Operating Supply Voltage

    5V

  • Temperature Grade

    COMMERCIAL

  • Max Supply Voltage

    5.25V

  • Min Supply Voltage

    4.75V

  • Number of I/O

    64

  • Memory Type

    EEPROM

  • Propagation Delay

    20 ns

  • Turn On Delay Time

    20 ns

  • Frequency (Max)

    100MHz

  • Programmable Logic Type

    EE PLD

  • Number of Gates

    3200

  • Number of Programmable I/O

    64

  • Number of Logic Blocks (LABs)

    10

  • Speed Grade

    20

  • Output Function

    MACROCELL

  • Number of Macro Cells

    160

  • JTAG BST

    NO

  • In-System Programmable

    NO

  • Height

    3.81mm

  • Length

    29.31mm

  • Width

    29.31mm

  • Radiation Hardening

    No

  • RoHS Status

    RoHS Compliant

  • Lead Free

    Contains Lead

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