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Home Home Integrated Circuits (ICs) CPLDs EPM7256BUC169-5
EPM7256BUC169-5
  • EPM7256BUC169-5
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EPM7256BUC169-5

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Manufacturer No:

EPM7256BUC169-5

Manufacturer:

Altera

HK JDW NO:

2936-EPM7256BUC169-5

Package:

BGA

Datasheet:

EPM7256BUC169-5

Description:

1.8/3.32.5V 0.8mm PMIC 160 Pin 250MHz 2.5V BGA

Quantity:

Add to RFQ list

In Stock : 999

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EPM7256BUC169-5 Overview


The mobile phone network has 256 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).You can find it in package [0].This device has 141 I/O ports programmed into it.It is programmed to terminate devices at [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.It is powered by a voltage of 2.5V volts.This part is in the family [0].The chip is programmed with 169 pins.It is also possible to find YESwhen using this device.It is possible to construct digital circuits using 5000gates, which are devices that serve as building blocks.In general, it is recommended to store data in [0].The electronic part is mounted by Surface Mount.The device is designed with pins [0].A maximum voltage of 3.6Vis required for operation.It is powered by 3Vas its minimum supply voltage.It operates from 1.8/3.32.5V power supplies.There are 100 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. There is 250MHz frequency that can be achieved.Operating temperatures should be higher than 0°C.It is recommended to keep the operating temperature below 70°C.In its simplest form, it consists of 16 logic blocks (LABs).A maximum frequency of less than 188.7MHzis recommended.A programmable logic type is categorized as EE PLD.

EPM7256BUC169-5 Features


BGA package
141 I/Os
169 pin count
160 pins
1.8/3.32.5V power supplies
16 logic blocks (LABs)

EPM7256BUC169-5 Applications


There are a lot of Altera EPM7256BUC169-5 CPLDs applications.

  • DMA control
  • LED Lighting systems
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • Custom state machines
  • Multiple DIP Switch Replacement
  • POWER-SAVING MODES
  • Bootloaders for FPGAs
  • Multiple Clock Source Selection
  • Boolean function generators
  • Digital systems
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EmailEmail for receiving inquiries: jindawei@hkjdwchip.com

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3. RFQ (Request for Quotations)

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2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

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Purchasing and Inquiry

Payment Method

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East West Bank charge US$30.00 banking fee.
The fee is charged according to the rule of PayPal.
Western Union charge US$0.00 banking fee.

Shipping

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From $40.00 basic shipping fee depend on zone and country.
UPS(www.ups.com)
From $40.00 basic shipping fee depend on zone and country.
FedEx(www.fedex.com)
From $40.00 basic shipping fee depend on zone and country.
Registered Mail(www.singpost.com)
From $10.00 basic shipping fee depend on different zone and country.

Package

Product
Step1Product
Casing drivepipe
Step2Casing drivepipe
Anti-static bag
Step3Anti-static bag
Packaging boxes
Step4Packaging boxes
Bar-code shipping tag
Step5Bar-code shipping tag

EPM7256BUC169-5

technical specifications, attributes, parameters and parts with similar specifications to EPM7256BUC169-5.

  • Type
    Parameter
    Select All

  • Factory Lead Time

    8 Weeks

  • Mount

    Surface Mount

  • Package / Case

    BGA

  • Number of Pins

    160

  • Published

    1998

  • JESD-609 Code

    e0

  • Pbfree Code

    no

  • Part Status

    Discontinued

  • Moisture Sensitivity Level (MSL)

    3

  • Number of Terminations

    169

  • ECCN Code

    3A991

  • Terminal Finish

    Tin/Lead (Sn/Pb)

  • Max Operating Temperature

    70°C

  • Min Operating Temperature

    0°C

  • Additional Feature

    YES

  • HTS Code

    8542.39.00.01

  • Subcategory

    Programmable Logic Devices

  • Technology

    CMOS

  • Terminal Position

    BOTTOM

  • Terminal Form

    BALL

  • Peak Reflow Temperature (Cel)

    235

  • Supply Voltage

    2.5V

  • Terminal Pitch

    0.8mm

  • Frequency

    250MHz

  • Time@Peak Reflow Temperature-Max (s)

    30

  • Pin Count

    169

  • Qualification Status

    Not Qualified

  • Power Supplies

    1.8/3.32.5V

  • Temperature Grade

    COMMERCIAL

  • Max Supply Voltage

    3.6V

  • Min Supply Voltage

    3V

  • Number of I/O

    141

  • Memory Type

    EEPROM

  • Propagation Delay

    5 ns

  • Frequency (Max)

    188.7MHz

  • Programmable Logic Type

    EE PLD

  • Number of Gates

    5000

  • Number of Programmable I/O

    100

  • Number of Logic Blocks (LABs)

    16

  • Output Function

    MACROCELL

  • Number of Macro Cells

    256

  • JTAG BST

    YES

  • In-System Programmable

    YES

  • Height Seated (Max)

    1.55mm

  • Length

    11mm

  • Width

    11mm

  • RoHS Status

    RoHS Compliant

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